Hi, Kindly advise how to design the FILTER for the current output from XTR115U
Regards
Atul Bhakay
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XTR115U - Filter Design
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Single supply op amp with 0 to +10V out
Looking for a single supply op amp capable of 0 to 10V output. Its output should get to within say 10 mV of ground when input is 0 V. This would be for a load of say 10K. The OPA354 has worked well for me but is only a 5V device. The LM358/324 can get that close to ground but I am looking for a better quality op amp.
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INA333 - ina 333 oscillation
Part Number: INA333
Application: Energy Meter
Question type: Development and troubleshooting
Support topic: /Product/Device selection assistance/
Description of the problem: Hi,
I finished assembling my prototype single-phase energy meter (photos attached).
When i measure with the oscilloscope i checked a small oscillation in output of INA333
, range of about 37 khz (photos attached).
Also I'm using a opamp with gain digitally Variable Intersil (isl28534) and a principle NOT presented problems.
The circuit is a little different.
I'm using isl28534 for the current measurement and the INA333 at Voltage Measurement.
In annex follow the schematic only with INA333.
The output of the INA333 enters at the A/D microcontroller converter (dsPIC).
I removed the microcontroller to check if the oscillation stop, unsuccessfully.
The zmpt101B( "voltage transformer" ) has a inductance of 144 Henrys and 120 ohms resistance in both sides.
Thank's for the help,
Application: Energy Meter
Question type: Development and troubleshooting
Support topic: /Product/Device selection assistance/
Description of the problem: Hi,
I finished assembling my prototype single-phase energy meter (photos attached).
When i measure with the oscilloscope i checked a small oscillation in output of INA333
, range of about 37 khz (photos attached).
Also I'm using a opamp with gain digitally Variable Intersil (isl28534) and a principle NOT presented problems.
The circuit is a little different.
I'm using isl28534 for the current measurement and the INA333 at Voltage Measurement.
In annex follow the schematic only with INA333.
The output of the INA333 enters at the A/D microcontroller converter (dsPIC).
I removed the microcontroller to check if the oscillation stop, unsuccessfully.
The zmpt101B( "voltage transformer" ) has a inductance of 144 Henrys and 120 ohms resistance in both sides.
Thank's for the help,
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OPA129 Input Bias Currents using Tina/Pspice Model
I downloaded the OPA129 Tina Reference Design and notice that there is ~16pA of input bias current. I measured using the Ampere Meter. I was expecting to measure < 100fF. Can you help explain this?
Thanks,
Greg
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LMP91050 60Hz Noise
Evaluating the LMP91050 thermopile amplifier over the last few days using the LMP91050EVBDEVAL eval board. The board worked fine with the input shorted at J2 (CMOUT connected to IN). When I connect the thermopile that we use there is very significant AC power noise at 60Hz. Peak to peak value with GAIN1 set to 250 and GAIN2 set to 32 and using internal signal routing is about 900 codes peak to peak. Using the out of the box external filter the peak to peak drop to 600 codes.
I ruled out the thermopile package as the culprit by installing a 100K resistor between CMOUT and IN. 100K is about the internal resistance of the thermopile so this represents the thermopile without any signal. The noise is still present with the 100K resistor.
The level of AC noise can be changed by changing GAIN2 and you can see the 60 Hz AC waveform on the output of the LMP91050. I can touch a small wire to the IN signal and the AC noise causes the amplifier output to rail. So the noise is definitely on the IN signal with respect to CMOUT.
I did design a bandpass filter using the typical circuit that provides -18dB delta for the target 3Hz frequency and the 60Hz noise signal. Even with the newly designed bandpass filter, the noise is still to high for this application.
I have an existing design that uses an instrumentation amplifier with a differential input and that does not have the 60Hz noise problem because the 60Hz signal is common mode and is cancelled out. It appears the problem is due to the fact that this part is a single ended design and therefore prone to noise.
Is anyone else experiencing this problem? If so, what have you done to mitigate AC power noise. I was contemplating a more aggressive bandpass external filter but wanted to post this first before going down that path.
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about OPA2171 input
dear supporting team,
is there clamp circuit btw IN+ &IN- of OPA2171? customer found when the input voltage difference btw IN+ & IN- is very big, then IN+ and IN- will affect each other. tks!
The issue phenomenon is as below:
PIN3 is input of 2.5V reference through 1K Ohm.
PIN2 is the voltage sampled & amplified from output current(OCP)
1. if using OPA2171 in D2, when the brd is unloaded, they will find the voltage of PIN3 is only 2.15V, when output current is increasing, i.e PIN2 voltage will increase as well, PIN3 voltage will also increase. when output current get to 30A, then PIN3 get to 2.5V. then even they increase the output current, PIN3 keep 2.5V.
2. if remove R125 and C13, pin2 is floating, PIN2 is not 0V.
3. if change D2 to LM2904, keep other portion the same. PIN3 will stay at 2.5V, will not change with the output current. so what cause the different behavior of LM2904 and OPA2171?
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LMV761 Input Voltage Range
Hello TI,
If someone can answer whether for LMV761 if an input is close to the VICRmin (-0.3V) and the other is 0V what happens with the bias currents? Are they still in the pA range or do they drift like a p-n junction.
I see in the SPICE model the diode behavior on the negative side as well on the VICRmax side (VCC-1.3V). Basically would this reflect the reality or not?
Thanks a lot for your help.
Best Regards,
Mihai
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DRL Feedback design
Hello,
I am trying to develop a low power EEG measurement system based on the INA333 ECG example showed in its datasheet. As I am planning to realize the design with the INA2141 I don't know if this is the best option (as there is no model of the INA2141).
I am not 100% of the proper result plot of the 1/Beta graph and I am having troubles to plot the real open loop gain of the OPA333 in order to get the frequency compensation done.
Some pictures are attached to clarify the questions.
Am I missing something or the results are the expected?
Regards,
Alberto
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LMP91050 CMOUT capacitive loading
The LMP91050 data sheet page 6 electrical specifications states the typical capacitive load on CMOUT is 10nF. No minimum or maximum is specified. The LMP91050 eval board has a 10nF cap to GND on CMOUT. The data sheet does not require a capacitive load on CMOUT in any of the details about how to use the part. Page 6 is the only place where there is any mention of capacitive load.
I'm fighting a AC noise problem on this part and need to know the actual limits on CMOUT capacitance values.
Is a cap required on CMOUT for stability reasons?
If yes, what is the minimum and maximum value?
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[ TL974-Q1 ] Channel Separation and Input Current Noise Density Specification
[ TL974-Q1 ] Channel Separation and Input Current Noise Density Specification
Hi,
Can you please let me know the Channel Separation and Input Current Noise Density of TL974-Q1?
I cannot see these specifications from datasheet.
Thank you for your help.
Regards,
Ken
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AFE032 DAC mode/Digital filter/
Hi All,
I intend to implement FCC/CENELENC/ARIB using AFE032 DAC mode,
there are couple questions, please kindly helps,
I following sequence to write samples to the DAC as AFE032 recommond
the parameters as following is current status
for FCC/ARIB sample frequency fs is 1.2MHz, then XCLK is 19.2MHz, SCLK is 19.2MHz,
1. set CS is low and Write the first 12-bit word to DIN
2. Set CS high to indicate that the sample is entered and Wait for at least four SCLK cycles
I am follow Table 10 in AFE032 datasheet. get the DAC_CLK is 4.8MHz and bypass block1,2,and 4, includes Block3 only.
does these configure correct setting?
(Q: Shall I set these REG_COEFF1_BLOCK_1/2_MS/LS~REG_COEFF7_BLOCK_1/2_MS/LS when I bypass block1 and 2?)
also for CENELENC sample frequency is 400KHz, then XCLK is 19.2MHz, SCLK is 19.2MHz,
1. set CS is low and Write the first 12-bit word to DIN
2. Set CS high to indicate that the sample is entered and Wait for at least 32 SCLK cycles
and Digital filter as like FCC/ARIB
the other question, regards to DAC output (pin14)
I have 12bit samples, range [0x800~0x7ff]
I add bias(0x800) on each sample when I send sample through SPI to DAC mode,
I expected DAC out(pin 14) see range [-DAC_NRF~ +DCA_NRF], but Table 4 show it is not.
the last question is XCLK 19.2M Hz is not 50% duty cycle(Hign 46.6% and Low is 53.33%)
does it work fine on AFE032?
Best Regards
Tarzan
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AD712/3 Replacement, Improved OPAx197 Distortion
Hi Team,
I'm looking for a replacement for the AD712 that is available in the standard SOIC-8 package. Non rail-to-rail input is preferred as my customer does not want the distortion due to the nonlinear transition region of the P&N input differential pairs when the op amp common mode input voltage varies. My customer had chosen ADA4610-2 on their board, but saw the distortion and as a result, tried the OPA2197, which has better results, but they are still seeing some distortion. All of the distortion they are seeing is caused by the op amp's rail-to-rail input architecture. They want something with specifications better or at least as good as the AD712.
- not rail-to-rail input
- doesn't have to be RRO
- +/- 15V supply
- common mode up to 13V
- no phase reversal on input
- 5-20MHz unity gain BW
Do we have anything that would improve on the distortion they are seeing with our OPAx197 devices?
Thanks in advance for your support.
Best Regards,
Brian Gosselin
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fully differential offset nulling
I am currently designing with LMP8350. I have encountered an offset at the input that I would like to null. What is the appropriate way to do this? Is there an alternate fully differential amplifier with similar specs that has a built in offset nulling circuit?
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LMP7300 - Problems with the behaviour of the SPICE model
Hello,
looking for a high precision and low power comparator I found the LMP7300. Trying to verify the behaviour and especially the settings for the trip point and the hysteresis, I used the the SPICE model I found on TI's website.
Unfortunately, the simulation does not behave as expected. I set up a basic configuration with the reference voltage connected to INN, and the terminals HYSTP and HYSTN were tied to a voltage smaller than 2.048 V in order to achieve a symmetrical hysteresis, e.g. to 2.028 V. According to the datasheet that should lead to hysteresis of +/-20 mV. The input test signal was tied between the terminal INP and GND. A DC offset > 1V on the input signal avoids problems with the limited common-mode range of the inputs.
In this configuration I would expect output transitions at 2.048 V + 20 mV for the upper trip point VIH and 2.048 V - 20 mV for the lower trip point VIL. Unfortunately, the result showed two transitions near 2.068 V with a small hysteresis of about 3 mV. What is that?
Removing the resistor divider for the hysteresis setup and replacing it by a voltage source did not change anything. But with two voltage sources, it was possible to setup two different voltages for HYSTP and HYSTN with V_HYSTP = 2.048 V + 20 mV and V_HYSTN = 2.048 V - 20 mV. With this setup the comparator behaved as expexted.
The simulator I use is ICAP/4 from Intusoft. To make sure that there are no issues with the simulator, I checked the behaviour of the LMP7300 model with TINA-TI - and found the same results.
That is all very confusing and hard to believe that the real component should behave this way. Is here somebody who has experience with the model of the LMP7300 and can help me to find out what is going wrong?
Many thanks in advance
Hans-Juergen
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INA826 dc error budget calculator
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LMP2012 Schematic Diagram
I am looking for the Schematic Diagram of the LMP2012 for SEDR radiation analysis. I have seen the LM158 Schematic Diagram on the LM158 datasheet but I can't find the LMP2012's diagram. Can I see the diagram or, if not, can you tell me if the LMP2012 has the compensation capacitor like the LM158 does?
Thank you,
Chris
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INA826 AC measurement and Tina simulation
Hello,
I would like to measure AC voltage using INA826. I designed a circuit and run simulation in Tina.
AC amlpitude: 30V, VDD=30V, Uref=1,65V. Is the circuit design correct? I expected the input to be just amplified and increased by Uref.
Thank you, Ondra.
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TLV521 as a comparator?
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I need a amplifier that has differential gain for positive and negative input
Hi
I need an amplifier that has differential gain for positive and negative input signal.
the amplifier must have only one output with positive and negative.
not two outputs with positive and negative seperately.
could you give me some advice.
Thank you.
Weiming
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OPA2188 Stability Issue
Hi team,
My customer recently met the stability issue.
I try to help to analyze the phase margin.
Could you please help to check whether my setting is right?
Schematic:
Loop1:
Loop2:
If the setting is right and good simulated phase margin, what is the reason that customer's waveform looks bad.
Could you please help to give some suggestions?
Thanks!
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Best,
Jason Wu
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